{"component":{"type":17,"accent_color":14263361,"components":[{"type":10,"content":"-# WikiRNG · Roll of 10/22/2026 · by [BinaryPrime](https://wikirng.com/u/BinaryPrime)"},{"type":10,"content":"## [Design flow](https://wikirng.com/roll/kbSuy3xQJh)\n*Suite of electronic design tools*"},{"type":10,"content":">>> Design flows, often known as RTL to GDSII, are the explicit combination of electronic design automation tools to accomplish the design of an integrated circuit. They start with a textual description of the proposed chip operation, written in a register…"},{"type":14,"divider":true,"spacing":1},{"type":10,"content":"### 🟧 Fabled · 251,620 SP\n-# Top 4.9%"},{"type":10,"content":"*Design a textual description of electronic tools.*"},{"type":14,"divider":true,"spacing":1},{"type":10,"content":"🟪 🤓 **Too Technical** · Remarkable · +210,516 SP\n-# Tagged as too technical.\n🟦 🧪 **arXiv** · Obscure · +18,885 SP\n-# Links to arXiv.\n🟩 🧩 **Isogram** · Notable · +6,275 SP\n-# No letter repeats (8+ letters).\n🟩 🧯 **Multiple Issues** · Notable · +5,506 SP\n-# Has the multiple issues box.\n🟩 🔓 **Free to Read** · Notable · +1,731 SP\n-# Cites a source that is free to read.\n🟩 📎 **More Citations Needed** · Notable · +1,336 SP\n-# Tagged as needing more sources.\n-# +15 more badges"},{"type":14,"divider":true,"spacing":1},{"type":1,"components":[{"type":2,"style":5,"label":"View roll","url":"https://wikirng.com/roll/kbSuy3xQJh"},{"type":2,"style":5,"label":"Read on Wikipedia","url":"https://en.wikipedia.org/wiki/Design_flow"}]},{"type":10,"content":"-# Article text from Wikipedia, CC BY-SA 4.0"}]}}